The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2021
Filed:
Oct. 08, 2019
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Claus Waechter, Sinzing, DE;
Edward Fuergut, Dasing, DE;
Bernd Goller, Otterfing, DE;
Michael Ledutke, Saal, DE;
Dominic Maier, Pleystein, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); B81C 1/00 (2006.01); B81B 7/00 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00269 (2013.01); B81B 7/0058 (2013.01); B81B 7/0077 (2013.01); B81C 1/00888 (2013.01); B81B 2201/0235 (2013.01); B81B 2201/0257 (2013.01); B81B 2203/0127 (2013.01); B81B 2203/0315 (2013.01); B81B 2207/012 (2013.01); B81B 2207/09 (2013.01); B81B 2207/092 (2013.01); B81B 2207/096 (2013.01); B81C 2201/034 (2013.01); B81C 2203/0118 (2013.01); B81C 2203/032 (2013.01); B81C 2203/0792 (2013.01);
Abstract
The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.