The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2021

Filed:

Apr. 21, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

John D. Hopkins, Meridian, ID (US);

Gordon A. Haller, Boise, ID (US);

Tom J. John, Boise, ID (US);

Anish A. Khandekar, Boise, ID (US);

Christopher Larsen, Boise, ID (US);

Kunal Shrotri, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 27/11582 (2017.01); H01L 27/11556 (2017.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31116 (2013.01); H01L 21/02178 (2013.01); H01L 21/31111 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

A method used in forming an array of elevationally-extending strings of memory cells comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. The stack comprises an etch-stop tier between a first tier and a second tier of the stack. The etch-stop tier is of different composition from those of the insulative tiers and the wordline tiers. Etching is conducted into the insulative tiers and the wordline tiers that are above the etch-stop tier to the etch-stop tier to form channel openings that have individual bases comprising the etch-stop tier. The etch-stop tier is penetrated through to extend individual of the channel openings there-through. After extending the individual channel openings through the etch-stop tier, etching is conducted into and through the insulative tiers and the wordline tiers that are below the etch-stop tier to extend the individual channel openings deeper into the stack below the etch-stop tier. Transistor channel material is formed in the individual channel openings elevationally along the etch-stop tier and along the insulative tiers and the wordline tiers that are above and below the etch-stop tier. Arrays independent of method are disclosed.


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