The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2021
Filed:
Nov. 06, 2019
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventor:
Arup Bhattacharyya, Essex Junction, VT (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/765 (2006.01); H01L 27/11548 (2017.01); H01L 29/40 (2006.01); H01L 21/763 (2006.01); H01L 21/762 (2006.01); H01L 27/11575 (2017.01); H01L 21/28 (2006.01); H01L 27/115 (2017.01);
U.S. Cl.
CPC ...
H01L 21/765 (2013.01); H01L 21/763 (2013.01); H01L 21/76237 (2013.01); H01L 27/11548 (2013.01); H01L 27/11575 (2013.01); H01L 29/402 (2013.01); H01L 29/40117 (2019.08); H01L 21/762 (2013.01); H01L 27/115 (2013.01);
Abstract
The present disclosure includes semiconductor structures and methods of forming semiconductor structures for trench isolation interfaces. An example semiconductor structure includes a semiconductor substrate having a shallow trench isolation (STI) structure with a trench formed therein. A material in the trench forms a charged interface by interaction with the semiconductor substrate of the STI structure. The formed charged interface raises a parasitic threshold of the STI structure.