The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2021

Filed:

Jun. 27, 2018
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Vase Jovanov, Munich, DE;

Peter Baumgartner, Munich, DE;

Gregor Bracher, Munich, DE;

Luis Giles, Neubiberg, DE;

Uwe Hodel, Neubiberg, DE;

Andreas Lachmann, Unterhaching, DE;

Philipp Riess, Munich, DE;

Karl-Henrik Ryden, Germering, DE;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0847 (2013.01); H01L 29/0696 (2013.01); H01L 29/1037 (2013.01); H01L 29/1095 (2013.01); H01L 29/66659 (2013.01); H01L 29/66795 (2013.01); H01L 29/7834 (2013.01); H01L 29/7835 (2013.01); H01L 29/7851 (2013.01); H01L 29/0665 (2013.01);
Abstract

A semiconductor device is proposed. The semiconductor device includes a source region of a field effect transistor having a first conductivity type, a body region of the field effect transistor having a second conductivity type, and a drain region of the field effect transistor having the first conductivity type. The source region, the drain region, and the body region are located in a semiconductor substrate of the semiconductor device and the body region is located between the source region and the drain region. The drain region extends from the body region through a buried portion of the drain region to a drain contact portion of the drain region located at a surface of the semiconductor substrate, the buried portion of the drain region is located beneath a spacer doping region, and the spacer doping region is located within the semiconductor substrate.


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