The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2021

Filed:

May. 13, 2020
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Igor Keller, Pleasanton, CA (US);

Ratnakar Goyal, New Delhi, IN;

Manuj Verma, Ghaziabad, IN;

Harmandeep Singh, New Delhi, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 119/02 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 2119/02 (2020.01);
Abstract

Disclosed are methods, systems, and articles of manufacture for characterizing an electronic design with a susceptibility window. These techniques identify a set of multiple aggressors in an electronic design and determine, at a susceptibility window module stored in memory and executing in conjunction with a microprocessor of a computing node, a susceptibility window for an internal node of a victim and a timing window for the set of multiple aggressors in the electronic design. These techniques further determine a subset having at least one aggressor using at least the susceptibility window of the victim and the timing window for the set of multiple aggressors, and determine whether a glitch in the electronic design causes a violation at the internal node of the electronic design based at least in part upon the timing window and the susceptibility.


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