The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 2021
Filed:
Aug. 24, 2018
Pdf Solutions, Inc., Santa Clara, CA (US);
Jeffrey Drue David, San Jose, CA (US);
Tomonori Honda, Santa Clara, CA (US);
Lin Lee Cheong, San Jose, CA (US);
PDF Solutions, Inc., Santa Clara, CA (US);
Abstract
A method for predicting yield for a semiconductor process. A particular type of wafer is fabricated to have a first set of features disposed on the wafer, with a wafer map identifying a location for each of the first set of features on the wafer. Data from wafer acceptance tests and circuit probe tests is collected over time for wafers of that particular type as made in a semiconductor fabrication process, and at least one training dataset and a least one validation dataset are created from the collected data. A second set of 'engineered' features are created and also incorporated onto the wafer and wafer map. Important features from the first and second sets of features are identified and selected, and using those important features as inputs, a number of different process models are run, with yield as the target. The results of the different models can be combined, for example, statistically.