The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2021

Filed:

Oct. 09, 2019
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Ki Yong Lee, Seoul, KR;

Se Jin Park, Yongin-si, KR;

Hyoung Min Im, Icheon-si, KR;

Bok Kyu Choi, Yongin-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); G01R 31/27 (2006.01); G01R 27/08 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); G01R 31/26 (2020.01); H05K 9/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); G01R 27/08 (2013.01); G01R 31/2601 (2013.01); G01R 31/27 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H05K 9/0009 (2013.01); H01L 2225/06537 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A method of obtaining contact resistance values of a semiconductor package, the semiconductor package includes a package substrate, a semiconductor chip mounted on the package substrate, a molding member disposed on the package substrate to surround the semiconductor chip, and an electromagnetic interference (EMI) shielding layer disposed on side surfaces of the package substrate and on the molding member. The package substrate includes a substrate body having a first surface and a second surface which are opposite to each other, first to fourth upper interconnection patterns disposed on the first surface of the substrate body in a first region of the package substrate and in contact with the EMI shielding layer, and an interconnection structure disposed in a second region of the package substrate.


Find Patent Forward Citations

Lee, Ki. (2021). Semiconductor packages configured for measuring contact resistances and methods of obtaining contact resistances of the semiconductor packages (U.S. Patent No. 11018094). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11018094

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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