The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2021

Filed:

Dec. 23, 2019
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Zhi-Cheng Lee, Tainan, TW;

Kai-Lin Lee, Kinmen County, TW;

Wei-Jen Chen, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 21/8238 (2006.01); H01L 27/12 (2006.01); H01L 27/092 (2006.01); H01L 27/108 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823481 (2013.01); H01L 21/02271 (2013.01); H01L 21/823431 (2013.01); H01L 21/823878 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 27/10879 (2013.01); H01L 27/1211 (2013.01); H01L 29/0653 (2013.01); H01L 29/66545 (2013.01);
Abstract

A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a first gate structure and a second gate structure on the first fin-shaped structure; using a patterned mask to remove the first gate structure and part of the first fin-shaped structure to form a first trench; and forming a first dielectric layer in the first trench to form a first single diffusion break (SDB) structure and around the second gate structure.


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