The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Jun. 12, 2019
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Bo Yu, Singapore, SG;

Shaoqiang Zhang, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/12 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/783 (2013.01); H01L 21/76264 (2013.01); H01L 21/76283 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 27/1207 (2013.01); H01L 29/0653 (2013.01); H01L 29/66568 (2013.01); H01L 29/66651 (2013.01); H01L 29/78651 (2013.01);
Abstract

A device may include a semiconductor-on-insulator (SOI) structure that may include a substrate, an insulator layer over the substrate, and a semiconductor layer over the insulator layer. The semiconductor layer may include a first conductivity region and a second conductivity region at least partially arranged within the semiconductor layer. The device may further include a gate structure arranged over the semiconductor layer and between the first conductivity region and the second conductivity region; a first conductor element arranged through the semiconductor layer and the insulator layer of the SOI structure to electrically contact the substrate; a second conductor element arranged to electrically contact the gate structure; and a conducting member connecting the first conductor element and the second conductor element to electrically couple the first conductor element and the second conductor element.


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