The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Oct. 17, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

William J. Lambert, Chandler, AZ (US);

Mihir K Roy, Chandler, AZ (US);

Mathew J Manusharow, Phoenix, AZ (US);

Yikang Deng, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01F 7/06 (2006.01); H01F 27/28 (2006.01); H01F 17/00 (2006.01); H01F 41/04 (2006.01); C25D 5/16 (2006.01); C25D 5/48 (2006.01); C25D 7/00 (2006.01); H01F 27/255 (2006.01); H01F 41/02 (2006.01);
U.S. Cl.
CPC ...
H01F 27/2804 (2013.01); C25D 5/16 (2013.01); C25D 5/48 (2013.01); C25D 7/00 (2013.01); H01F 17/0013 (2013.01); H01F 17/0033 (2013.01); H01F 27/255 (2013.01); H01F 41/0206 (2013.01); H01F 41/041 (2013.01); H01F 41/046 (2013.01); H01F 2017/002 (2013.01); H01F 2027/2809 (2013.01);
Abstract

Devices and methods including a though-hole inductor for an electronic package are shown herein. Examples of the through-hole inductor include a substrate including at least one substrate layer. Each substrate layer including a dielectric layer having a first surface and a second surface. An aperture included in the dielectric layer is located from the first surface to the second surface. The aperture includes an aperture wall from the first surface to the second surface. A conductive layer is deposited on the first surface, second surface, and the aperture wall. At least one coil is cut from the conductive layer and located on the aperture wall.


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