The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2021
Filed:
Jan. 09, 2019
Intel Corporation, Santa Clara, CA (US);
Balaji Vembu, Folsom, CA (US);
Brandon Fliflet, El Dorado Hills, CA (US);
James Valerio, North Plains, OR (US);
Michael Apodaca, Folsom, CA (US);
Ben Ashbaugh, Folsom, CA (US);
Hema Nalluri, Hyderabad, IN;
Ankur Shah, Folsom, CA (US);
Murali Ramadoss, Folsom, CA (US);
David Puffer, Tempe, AZ (US);
Altug Koker, El Dorado Hills, CA (US);
Aditya Navale, Folsom, CA (US);
Abhishek R. Appu, El Dorado Hills, CA (US);
Joydeep Ray, Folsom, CA (US);
Travis Schluessler, Berthoud, CO (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments described herein provide a graphics, media, and compute device having a tiled architecture composed of a number of tiles of smaller graphics devices. The work distribution infrastructure for such device enables the distribution of workloads across multiple tiles of the device. Work items can be submitted to any one or more of the multiple tiles, with workloads able to span multiple tiles. Additionally, upon completion of a work item, graphics, media, and/or compute engines within the device can readily acquire new work items for execution with minimal latency.