The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2021
Filed:
Sep. 17, 2020
Applicant:
Globalwafers Co., Ltd., Hsinchu, TW;
Inventors:
Assignee:
GlobalWafers Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/324 (2006.01); H01L 21/02 (2006.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76251 (2013.01); H01L 21/02052 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02581 (2013.01); H01L 21/3247 (2013.01); H01L 21/76254 (2013.01); H01L 27/14632 (2013.01);
Abstract
A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um×30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.