The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Sep. 30, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Aaron D. Lilak, Beaverton, OR (US);

Rishabh Mehandru, Beaverton, OR (US);

Patrick Morrow, Portland, OR (US);

Patrick H. Keys, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/78 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 21/302 (2006.01); H01L 21/768 (2006.01); H01L 21/304 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); H01L 21/02 (2013.01); H01L 21/302 (2013.01); H01L 21/304 (2013.01); H01L 21/762 (2013.01); H01L 21/768 (2013.01); H01L 21/76802 (2013.01); H01L 21/78 (2013.01); H01L 29/66 (2013.01); H01L 29/66795 (2013.01);
Abstract

Methods and apparatus to remove epitaxial defects in semiconductors are disclosed. A disclosed example multilayered die structure includes a fin having a first material, where the fin is epitaxially grown from a first substrate layer having a second material, and where a defect portion of the fin is etched or polished. The disclosed example multilayered die structure also includes a second substrate layer having an opening through which the fin extends.


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