The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Nov. 30, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Dae-Won Ha, Seoul, KR;

Byoung-Hak Hong, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/84 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/088 (2006.01); H01L 29/165 (2006.01); H01L 21/02 (2006.01); H01L 21/266 (2006.01); H01L 29/06 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/02192 (2013.01); H01L 21/266 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823481 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823878 (2013.01); H01L 21/845 (2013.01); H01L 27/0886 (2013.01); H01L 29/0642 (2013.01); H01L 29/0649 (2013.01); H01L 29/165 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01); H01L 29/66818 (2013.01); H01L 29/7846 (2013.01); H01L 29/7854 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01);
Abstract

An integrated circuit device includes: a plurality of channel regions spaced apart from each other in an active region; a plurality of source/drain regions; an insulating structure on the active region, the insulating structure defining a plurality of gate spaces; a first gate stack structure in a first of the gate spaces, the first gate stack structure including a first work function metal-containing layer; and an isolation stack structure in a second of the gate spaces that is adjacent the first of the gate spaces, the isolation stack structure having a different stack structure from the first gate stack structure and being configured to electrically isolate a portion of the active region.


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