The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10967450 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 06, 2021

Filed:

May. 04, 2018
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Nirdesh Ojha, Villach, AT;

Francisco Javier Santos Rodriguez, Villach, AT;

Roland Rupp, Lauf, DE;

Markus Heinrici, Villach, AT;

Karin Delalut, Klagenfurt, AT;

Claudia Friza, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23H 7/06 (2006.01); B23H 7/10 (2006.01); B23H 7/14 (2006.01); B23H 7/30 (2006.01); B23H 7/34 (2006.01); B23H 1/02 (2006.01);
U.S. Cl.
CPC ...
B23H 7/06 (2013.01); B23H 1/022 (2013.01); B23H 7/101 (2013.01); B23H 7/14 (2013.01); B23H 7/30 (2013.01); B23H 7/34 (2013.01);
Abstract

A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.


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