The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

Aug. 13, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Juntao Li, Cohoes, NY (US);

Kangguo Cheng, Schenectady, NY (US);

John G. Gaudiello, Poughkeepsie, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 29/10 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/0243 (2013.01); H01L 21/0245 (2013.01); H01L 21/02381 (2013.01); H01L 21/02433 (2013.01); H01L 21/02532 (2013.01); H01L 21/02658 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 29/1054 (2013.01); H01L 29/66628 (2013.01); H01L 29/7849 (2013.01); H01L 21/02639 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes growing a first strained semiconductor layer on a substrate, the first strained semiconductor layer having a first type of strain, wherein the substrate comprises a first crystalline orientation at a top surface of the substrate, forming at least one trench in the substrate, wherein exposed sidewalls of the at least one trench have a second crystalline orientation different from the first crystalline orientation, growing a buffer layer in the at least one trench from the exposed sidewalls of the trench, and growing a second strained semiconductor layer on the buffer layer, the second strained semiconductor layer having a second type of strain, wherein the first type of strain is different from the second type of strain.


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