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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10943836 B1

PDFFull Text
Date of Patent:
Mar. 09, 2021

Filed:

May. 27, 2020

Gallium nitride nmos on si (111) co-integrated with a silicon pmos

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Marko Radosavljevic, Portland, OR (US);

Sansaptak Dasgupta, Hillsboro, OR (US);

Valluri R. Rao, Saratoga, CA (US);

Han Wui Then, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Patent Capital Group

Primary Examiner:

Yu-Hsi D Sun

Int. Cl.
CPC ...
H01L 21/8258 (2006.01); H01L 29/778 (2006.01); H01L 29/78 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/04 (2006.01); H01L 27/12 (2006.01); H01L 21/762 (2006.01); H01L 27/06 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 21/8258 (2013.01); H01L 21/76224 (2013.01); H01L 27/0605 (2013.01); H01L 27/0924 (2013.01); H01L 27/1207 (2013.01); H01L 29/045 (2013.01); H01L 29/0649 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/78 (2013.01); H01L 29/2003 (2013.01); H01L 29/41766 (2013.01); H01L 29/4236 (2013.01); H01L 29/7851 (2013.01);
Abstract

A complementary metal oxide semiconductor (CMOS) device that includes a gallium nitride n-type MOS and a silicon P-type MOS is disclosed. The device includes silicon 111 substrate, a gallium nitride transistor formed in a trench in the silicon 111 substrate, the gallium nitride transistor comprising a source electrode, a gate electrode, and a drain electrode. The device further includes a silicon/polysilicon layer formed over the gallium nitride transistor.

Find Patent Forward Citations

Radosavljevic, Marko. (2021). Gallium nitride nmos on si (111) co-integrated with a silicon pmos (U.S. Patent No. 10943836). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10943836

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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