The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2021
Filed:
May. 23, 2014
Texas Instruments Incorporated, Dallas, TX (US);
Yongxi Zhang, Plano, TX (US);
Philip L. Hower, Concord, MA (US);
Sameer P. Pendharkar, Allen, TX (US);
John Lin, Chelmsford, MA (US);
Guru Mathur, Plano, TX (US);
Scott Balster, Dallas, TX (US);
Victor Sinow, Oakland, CA (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
A semiconductor device includes at least a first transistor including at least a second level metal layer (second metal layer) above a first level metal layer coupled by a source contact to a source region doped with a first dopant type. The second level metal layer is coupled by a drain contact to a drain region doped with the first dopant type. A gate stack is between the source region and drain region having the second level metal layer coupled by a contact thereto. The second level metal layer is coupled by a contact to a first isolation region doped with the second dopant type. The source region and drain region are within the first isolation region. A second isolation region doped with the first dopant type encloses the first isolation region, and is not coupled to the second level metal layer so that it electrically floats.