The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2021
Filed:
Jul. 27, 2018
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Cheng-Chieh Lai, Hsin-Chu, TW;
Meng-Ting Yu, Hsinshu, TW;
Yung-Hsien Wu, Hsin-Chu, TW;
Kuang-Hsin Chen, Jung-Li, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 27/108 (2006.01); H01L 49/02 (2006.01); H01L 21/02 (2006.01); H01L 21/283 (2006.01); H01L 21/324 (2006.01); H01L 23/535 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); H01L 21/02532 (2013.01); H01L 21/02601 (2013.01); H01L 21/283 (2013.01); H01L 21/324 (2013.01); H01L 23/535 (2013.01); H01L 27/0629 (2013.01); H01L 27/10814 (2013.01); H01L 28/40 (2013.01); H01L 28/60 (2013.01);
Abstract
The present disclosure provides one embodiment of a semiconductor structure that includes an interconnection structure formed on a semiconductor substrate; and a capacitor disposed in the interconnection structure. The interconnection structure includes a top electrode; a bottom electrode; a dielectric material layer sandwiched between the top and bottom electrodes; and a nanocrystal layer embedded in the dielectric material layer.