The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Mar. 30, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Asad Azam, Folsom, CA (US);

R Selvakumar Raja Gopal, Tapah, MY;

Kaitlyn Chen, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3187 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3187 (2013.01); G06F 11/073 (2013.01); G06F 11/0766 (2013.01); G06F 11/0793 (2013.01); G06F 11/1044 (2013.01); G06F 11/1048 (2013.01); G11C 29/00 (2013.01);
Abstract

Technologies for built-in self-testing of a memory array using error detection and correction code knowledge include identifying data errors between pseudo random data written to the memory array and the data read back from the memory array and ignoring those data errors determined to be correctable. The data errors may be determined to be correctable if an error corrector circuit can correct those errors or if the number of errors per memory chuck is less than a number of errors correctable by the error correct circuit.


Find Patent Forward Citations

Loading…