The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Dec. 23, 2019
Applicant:

Eagle Technology, Llc, Melbourne, FL (US);

Inventors:

Michael T. DeRoy, Melbourne, FL (US);

Marvin D. Miller, Palm Bay, FL (US);

Andres M. Gonzalez, Melbourne, FL (US);

David Cure, West Melbourne, FL (US);

Tena M. Hochard, Palm Bay, FL (US);

Assignee:

EAGLE TECHNOLOGY, LLC, Melbourne, FL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01R 12/73 (2011.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H05K 3/40 (2006.01); H05K 3/46 (2006.01); H01R 12/70 (2011.01);
U.S. Cl.
CPC ...
H05K 1/0228 (2013.01); H01R 12/707 (2013.01); H01R 12/737 (2013.01); H05K 1/115 (2013.01); H05K 1/181 (2013.01); H05K 3/0026 (2013.01); H05K 3/4038 (2013.01); H05K 3/4673 (2013.01); H05K 2201/09509 (2013.01); H05K 2201/09563 (2013.01); H05K 2201/09672 (2013.01); H05K 2201/10189 (2013.01); H05K 2201/10704 (2013.01); H05K 2201/10795 (2013.01); H05K 2201/10901 (2013.01); H05K 2203/107 (2013.01);
Abstract

Systems and methods for providing a PWB. The methods comprise: forming a Core Substrate ('CS') a First Via ('FV') formed therethrough; disposing a First Trace (“FT”) on an exposed surface of CS that is in electrical contact with FV; laminating a first HDI substrate to CS such that FT electrically connects FV via with a Second Via (“SV”) formed through the first HDI substrate; disposing a Second Trace (“ST”) on an exposed surface of the first HDI substrate that is in electrical contact with SV; and laminating a second HDI substrate to the first HDI substrate such that ST electrically connects SV to a Third Via (“TV”) formed through the second HDI substrate. SV comprises a buried via with a central axis spatially offset from central axis of FV and SV. FV and SV have diameters which are smaller than TV's diameter.


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