The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2021
Filed:
Dec. 07, 2018
Tokyo Electron Limited, Tokyo, JP;
Imec Vzw, Leuven, BE;
Koichi Yatsuda, Tokyo, JP;
Tatsuya Yamaguchi, Nirasaki, JP;
Yannick Feurprier, Nijmegen, NL;
Frederic Lazzarino, Leuven, BE;
Jean-Francois de Marneffe, Leuven, BE;
Khashayar Babaei Gavan, Leuven, BE;
TOKYO ELECTRON LIMITED, Tokyo, JP;
IMEC VZW, Leuven, BE;
Abstract
A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.