The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Jul. 15, 2019
Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Yusuke Yoshida, Albany, NY (US);

Christopher Catano, Albany, NY (US);

Christopher Talone, Albany, NY (US);

Nicholas Joy, Albany, NY (US);

Sergey Voronin, Albany, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/00 (2006.01); H01L 21/033 (2006.01); H01L 29/161 (2006.01); H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0334 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/823431 (2013.01); H01L 29/0669 (2013.01); H01L 29/161 (2013.01); H01L 29/6681 (2013.01);
Abstract

Embodiments are described herein that form silicon germanium nano-wires while reducing or eliminating erosion of nitride layers (e.g., masks and spacers) caused during selective etching of silicon with respect to silicon germanium during formation of silicon germanium nano-wires. oxide layers are used to protect nitride layers during formation of silicon germanium (SiGe) nano-wires. In particular, multilayer spacers including oxide/nitride/oxide layers are formed to protect the nitride layers during selective silicon etch processes that are used to form silicon germanium nano-wires, for example, for field effect transistors (FETs). The multilayer spacers allow for target levels of erosion to be achieved for the nitride layers.


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