The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Nov. 13, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Binghua Hu, Plano, TX (US);

Alexei Sadovnikov, Sunnyvale, CA (US);

Scott Kelly Montgomery, Rowlett, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/762 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 21/265 (2006.01); H01L 21/8234 (2006.01); H01L 21/74 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76237 (2013.01); H01L 21/26586 (2013.01); H01L 21/743 (2013.01); H01L 21/76229 (2013.01); H01L 21/823481 (2013.01); H01L 21/823493 (2013.01); H01L 27/088 (2013.01); H01L 29/0649 (2013.01); H01L 29/1083 (2013.01); H01L 29/1087 (2013.01); H01L 29/7816 (2013.01); H01L 21/26513 (2013.01); H01L 21/823418 (2013.01); H01L 29/42368 (2013.01);
Abstract

An electronic device, e.g. an integrated circuit, includes a semiconductor substrate having a top surface and an area of the semiconductor substrate surrounded by inner and outer trench rings. The inner trench ring includes a first dielectric liner that extends from the substrate surface to a bottom of the inner trench ring, the first dielectric liner electrically isolating an interior region of the inner trench ring from the semiconductor substrate. The outer trench ring surrounds the inner trench ring and includes a second dielectric liner that extends from the substrate surface to a bottom of the outer trench ring. The second dielectric liner includes an opening at a bottom of the outer trench ring, the opening providing a path between an interior region of the outer trench ring and the semiconductor substrate.


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