The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Jun. 04, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Won-Keun Kim, Hwaseong-si, KR;

Kyung-Suk Oh, Seongnam-si, KR;

Hwa-Il Jin, Seongnam-si, KR;

Dong-Kwan Kim, Hwaseong-si, KR;

Yeong-Seok Kim, Hwaseong-si, KR;

Jae-Choon Kim, Incheon, KR;

Seung-Tae Hwang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/373 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/563 (2013.01); H01L 21/565 (2013.01); H01L 23/3128 (2013.01); H01L 23/3736 (2013.01); H01L 23/481 (2013.01); H01L 24/09 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73257 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01);
Abstract

A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.


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