The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2020
Filed:
Sep. 17, 2019
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Yihung Lin, Hsinchu County, TW;
Yi-Feng Lu, Hsinchu, TW;
Huang-Ming Wu, Hsinchu, TW;
Chi-Ta Lu, Yilan County, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/00 (2006.01); G03F 7/20 (2006.01); G06F 30/392 (2020.01); G06F 30/337 (2020.01); G06F 30/398 (2020.01);
U.S. Cl.
CPC ...
G03F 7/70441 (2013.01); G06F 30/392 (2020.01); G06F 30/337 (2020.01); G06F 30/398 (2020.01);
Abstract
A method of generating an integrated circuit includes: receiving, by a processor, a first IC design layout; replacing, by the processor, a specific region in the first IC design layout with a first difference region; performing, by the processor, an inverse lithography technology process upon a junction region between the first difference region and the first IC design layout to generate a mask data; and causing the IC to be fabricated according to the mask data.