The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

May. 14, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Harry-Hak-Lay Chuang, Zhubei, TW;

Chih-Yang Chang, Hsinchu, TW;

Ching-Huang Wang, Pingjhen, TW;

Tien-Wei Chiang, Taipei, TW;

Meng-Chun Shih, Hsinchu, TW;

Chia Yu Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01R 31/28 (2006.01); G11C 11/16 (2006.01); G01R 1/16 (2006.01); G11C 29/56 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2865 (2013.01); G01R 1/16 (2013.01); G01R 31/2887 (2013.01); G01R 31/2891 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 29/56016 (2013.01); G11C 2029/5602 (2013.01);
Abstract

In some embodiments, a semiconductor wafer testing system is provided. The semiconductor wafer testing system includes a semiconductor wafer prober having one or more conductive probes, where the semiconductor wafer prober is configured to position the one or more conductive probes on an integrated chip (IC) that is disposed on a semiconductor wafer. The semiconductor wafer testing system also includes a ferromagnetic wafer chuck, where the ferromagnetic wafer chuck is configured to hold the semiconductor wafer while the wafer prober positions the one or more conductive probes on the IC. An upper magnet is disposed over the ferromagnetic wafer chuck, where the upper magnet is configured to generate an external magnetic field between the upper magnet and the ferromagnetic wafer chuck, and where the ferromagnetic wafer chuck amplifies the external magnetic field such that the external magnetic field passes through the IC with an amplified magnetic field strength.


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