The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Nov. 30, 2016
Applicant:

Shenzhen Xiuyuan Electronic Technology Co., Ltd., Guangdong, CN;

Inventors:

Chuan Hu, Chandler, AZ (US);

Junjun Liu, Albany, NY (US);

Yuejin Guo, Phoenix, AZ (US);

Edward Rudolph Prack, Phoenix, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 23/12 (2006.01); H05K 1/00 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/4864 (2013.01); H01L 21/4867 (2013.01); H01L 21/56 (2013.01); H01L 23/12 (2013.01); H01L 23/3128 (2013.01); H01L 23/4985 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 23/5387 (2013.01); H01L 24/32 (2013.01); H01L 25/0655 (2013.01); H05K 1/00 (2013.01); H01L 24/08 (2013.01); H01L 2224/08235 (2013.01); H01L 2224/3223 (2013.01); H01L 2224/32235 (2013.01); H01L 2224/838 (2013.01); H01L 2224/83013 (2013.01); H01L 2224/83031 (2013.01); H01L 2224/83039 (2013.01); H01L 2224/8385 (2013.01);
Abstract

An integrated circuit packaging method, including: a top surface of a substrate, a bottom surface of the substrate, or the interior of the substrate is provided with circuit layers, and the circuit layers are provided with circuit pins; a component element is mounted on the substrate, and a surface of the component element facing the substrate is provided with component pins; connection through holes are formed on the substrate, the connection through holes are made to abut on the circuit pins, and a first opening of the connection through holes is abutted on the component pins; conductive layers are fabricated inside of the connection through holes by means of a second opening of the connection through holes, and the conductive layers electrically connect the component pins with the circuit pins.


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