The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Feb. 26, 2019
Applicants:

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Inventors:

Deng Feng Ji, Shanghai, CN;

Jun Yang, Shanghai, CN;

Hong Tao Liu, Shanghai, CN;

You He Sha, Shanghai, CN;

Chen Xiao Wang, Shanghai, CN;

Ying Nan Li, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/552 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/7684 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01);
Abstract

Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having at least a first region; forming a dielectric structure over the semiconductor substrate; forming a plurality of first openings in the dielectric structure in the first region by removing portions of the dielectric structure in the first region; forming a first barrier member in each of the plurality of first openings; forming second openings with sidewall surfaces exposing sidewall surfaces of the first barrier members by removing portions of the dielectric structure between adjacent first openings; and forming a second barrier member in each of the plurality of second openings.


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