The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2020
Filed:
Sep. 28, 2017
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Lukas Czornomaz, Zurich, CH;
Herwig Hahn, Adliswil, CH;
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/205 (2006.01); H01L 23/31 (2006.01); H01L 21/762 (2006.01); H01L 21/02 (2006.01); H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 21/8258 (2006.01); H01L 29/08 (2006.01); H01L 27/085 (2006.01); H01L 29/20 (2006.01); H01L 27/092 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1207 (2013.01); H01L 21/0254 (2013.01); H01L 21/02458 (2013.01); H01L 21/76251 (2013.01); H01L 21/8258 (2013.01); H01L 23/3171 (2013.01); H01L 27/085 (2013.01); H01L 29/0649 (2013.01); H01L 29/0657 (2013.01); H01L 29/0843 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01); H01L 29/7781 (2013.01); H01L 29/7787 (2013.01); H01L 27/092 (2013.01); H01L 29/2003 (2013.01); H01L 29/41766 (2013.01);
Abstract
An ultra-thin-body GaN-on-Insulator device and a method of manufacturing may be provided. The device comprises a front-end-of-line processed CMOS platform terminated with an interlayer dielectric material, a first bonding layer atop the interlayer dielectric material and an ultra-thin-body GaN-based hetero-structure terminated with a second bonding layer. The GaN-based hetero-structure is bonded with the second bonding layer to the first bonding layer of the CMOS platform building the ultra-thin-body GaN-on-Insulator device.