The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2020
Filed:
Nov. 30, 2017
Synopsys, Inc., Mountain View, CA (US);
Eduard Cerny, Worcester, MA (US);
Gerald Taylor, Portland, OR (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A system receive as input a circuit design and a description of the behavior of the circuit design specified as assertions. The system generates a model used for verifying that the circuit design satisfies the specified behavior. The system generates an alternating automaton representing the assertions. The alternating automaton may be non-deterministic. The system translates the alternating automaton to a finite state machine (FSM) that may be represented using a representation such as a register transfer level (RTL) representation. The system models existential transitions in the state machine using variables. As a result, the system generates fewer states in the state machine, thereby requiring significantly less memory resources for processing the assertion. The system validates the circuit design using the state machine for further design and manufacture of the circuit.