The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Nov. 15, 2018
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Andreas Moser, Maria-Rain, AT;

Matteo Dainese, Villach, AT;

Matthias Kuenle, Villach, AT;

Hans-Joachim Schulze, Taufkirchen, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/78 (2006.01); H01L 21/762 (2006.01); H01L 21/324 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 29/73 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76224 (2013.01); H01L 21/0228 (2013.01); H01L 21/02274 (2013.01); H01L 21/324 (2013.01); H01L 21/6835 (2013.01); H01L 21/78 (2013.01); H01L 24/00 (2013.01); H01L 29/73 (2013.01); H01L 29/7393 (2013.01);
Abstract

An embodiment of a method for manufacturing a semiconductor device includes: providing a monocrystalline semiconductor substrate having a first side; forming a plurality of recess structures in the semiconductor substrate at the first side; filling the recess structures with a dielectric material to form dielectric islands in the recess structures; forming a semiconductor layer on the first side of the semiconductor substrate to cover the dielectric islands; and subjecting the semiconductor layer to heat treatment and recrystallizing the semiconductor layer to form a recrystallized semiconductor layer, so that a crystal structure of the recrystallized semiconductor layer adapts to a crystal structure of the semiconductor substrate, and so that the semiconductor substrate and the semiconductor layer together form a compound wafer with the dielectric islands at least partially buried in the semiconductor material of the compound wafer.


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