The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Dec. 12, 2019
Applicant:

Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;

Inventors:

Pei-Hsiu Tseng, Taoyuan, TW;

I-Shuan Wei, Taoyuan, TW;

Jia-You Lin, Hsinchu, TW;

Shou-Zen Chang, Hsinchu, TW;

Chi-Wei Lin, New Taipei, TW;

Hung-Hsun Lin, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4097 (2006.01); H01L 27/11 (2006.01); G11C 11/404 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4097 (2013.01); G11C 11/4045 (2013.01); H01L 27/108 (2013.01); H01L 27/1104 (2013.01);
Abstract

A bit line structure for two-transistor static random access memory (2T SRAM), including multiple bit lines extending over multiple 2T SRAMs in a first direction, wherein each bit line consists of multiple first portions and second portions extending in the first direction and electrically connecting with each other in an alternating manner, and the first portions and the second portions are in a first dielectric layer and a second dielectric layer respectively, and the first portions of each bit line correspond to the second portions of adjacent bit lines.


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