The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

Jan. 30, 2017
Applicant:

Psemi Corporation, San Diego, CA (US);

Inventors:

Michael A. Stuber, Carlsbad, CA (US);

Christopher N. Brindle, Poway, CA (US);

Dylan J. Kelly, San Diego, CA (US);

Clint L. Kemerling, Escondido, CA (US);

George P. Imthurn, San Diego, CA (US);

Robert B. Welstand, San Diego, CA (US);

Mark L. Burgener, San Diego, CA (US);

Alexander Dribinsky, Naperville, IL (US);

Tae Youn Kim, Irvine, CA (US);

Assignee:

pSemi Corporation, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 29/49 (2006.01); H03K 17/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78615 (2013.01); H01L 27/1203 (2013.01); H01L 29/4908 (2013.01); H01L 29/78651 (2013.01); H01L 29/78654 (2013.01); H01L 29/78657 (2013.01); H03K 17/162 (2013.01);
Abstract

A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.


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