The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

May. 20, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Harry Muljono, San Ramon, CA (US);

Linda K. Sun, Fremont, CA (US);

Maria Jose Garcia Garcia de Leon, Zapopan, MX;

Raul Enriquez Shibayama, Zapopan, MX;

Abraham Isidoro Munoz, Zapopan, MX;

Carlos Eduardo Lozoya Lopez, Thajomulco de Zuñiga, MX;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/0175 (2006.01); G06F 13/40 (2006.01); H04L 25/02 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0005 (2013.01); G06F 13/4086 (2013.01); H03K 19/017509 (2013.01); H03K 19/017545 (2013.01); H04L 25/0278 (2013.01);
Abstract

An apparatus includes a terminal, a first device coupled to the terminal via a first node, the first device to drive a signal on the terminal via the first node, and a second device coupled to the terminal via a second node, wherein the second device comprises a dynamic on-die termination (ODT) circuit coupled to the second node. The dynamic ODT circuit includes: a bus holder circuit to receive the signal from the first device at the second node and select a termination voltage based on the signal, a response delay circuit coupled to the bus holder circuit, the response delay circuit to delay application of the termination voltage to the second node, and a time blanking delay circuit coupled to the bus holder circuit and the response delay circuit to prevent the termination voltage from changing before a threshold period of time elapses.


Find Patent Forward Citations

Muljono, Harry. (2020). Dynamic on-die termination (U.S. Patent No. 10812075). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10812075

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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