The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Oct. 04, 2018
Applicant:

Disco Corporation, Tokyo, JP;

Inventors:

Ryugo Oba, Tokyo, JP;

Yukinobu Ohura, Tokyo, JP;

Hideyuki Sandoh, Tokyo, JP;

Assignee:

DISCO CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/78 (2006.01); H01L 21/683 (2006.01); H01L 23/544 (2006.01); H01L 21/308 (2006.01); H01L 21/3065 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14687 (2013.01); H01L 21/308 (2013.01); H01L 21/3065 (2013.01); H01L 21/3081 (2013.01); H01L 21/6715 (2013.01); H01L 21/67051 (2013.01); H01L 21/67092 (2013.01); H01L 21/67132 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 23/544 (2013.01); H01L 27/14632 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01); H01L 2223/5446 (2013.01);
Abstract

A method of processing a wafer having devices disposed in respective regions demarcated on a front face thereof by a grid of a plurality of projected dicing lines on the front face, the method includes a mask layer forming step of covering the front face of the wafer except for the regions where grooves are to be formed along the projected dicing lines with a resin material mixed with an ultraviolet ray absorber, and forming a mask layer on the front face of the wafer, a plasma etching step of performing plasma etching on the wafer from the mask layer side using a fluorine-based stable gas as an etching gas, and forming grooves in the wafer along the projected dicing lines, and a mask layer removing step of removing the mask layer after the plasma etching step is performed.


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