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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10797174 B1

PDFFull Text
Date of Patent:
Oct. 06, 2020

Filed:

Aug. 17, 2018

Semiconductor device with fin end spacer dummy gate and method of manufacturing the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Kai-Tai Chang, Kaohsiung, TW;

Tung Ying Lee, Hsinchu, TW;

Wei-Sheng Yun, Taipei, TW;

Tzu-Chung Wang, Hsinchu, TW;

Chia-Cheng Ho, Hsinchu, TW;

Ming-Shiang Lin, Hsinchu, TW;

Tzu-Chiang Chen, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;

Attorney:

McDermott Will & Emery LLP

Primary Examiner:

Michele Fan

Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 21/033 (2006.01); H01L 21/02 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); H01L 21/0228 (2013.01); H01L 21/0337 (2013.01); H01L 21/762 (2013.01); H01L 21/76829 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 23/5329 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 2029/7858 (2013.01);
Abstract

A semiconductor device includes a plurality of fins on a substrate. A fin liner is formed on an end surface of each of the plurality of fins. An insulating layer is formed on the plurality of fins. A plurality of polycrystalline silicon layers are formed on the insulating layer. A source/drain epitaxial layer is formed in a source/drain space in each of the plurality of fins. One of the polycrystalline silicon layers is formed on a region spaced-apart from the fins.

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