The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

Dec. 24, 2018
Applicant:

Ningbo Semiconductor International Corporation, Ningbo, CN;

Inventors:

Hailong Luo, Ningbo, CN;

Clifford Ian Drowley, Ningbo, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/50 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 21/56 (2013.01); H01L 23/291 (2013.01); H01L 23/481 (2013.01); H01L 24/09 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01);
Abstract

A wafer-level packaging method and a package structure are provided. In the packaging method, a device wafer integrated with a first chip is provided. The device wafer includes a first front surface integrated with the first chip and a first back surface opposite to the first front surface. A first oxide layer is formed on the first front surface. A second chip is provided to include a bonding surface, on which a second oxide layer is formed. A carrier substrate is provided to be temporarily bonded with the surface of the second chip that faces away from the bonding surface. The second chip is bonded with the device wafer through bonding the first and the second oxide layers using a fusion bonding process. The second chip and the carrier substrate are debonded. An encapsulation layer is formed on the first oxide layer and covers the second chip.


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