The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2020
Filed:
Feb. 12, 2019
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Inventors:
Atul Katoch, Kanata, CA;
Ali Taghvaei, Kanata, CA;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01); G11C 7/12 (2006.01); G11C 7/10 (2006.01); G11C 11/4091 (2006.01); G11C 7/18 (2006.01); G11C 16/04 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 7/06 (2013.01); G11C 7/106 (2013.01); G11C 7/18 (2013.01); G11C 11/4091 (2013.01); G11C 11/419 (2013.01); G11C 16/0483 (2013.01); G11C 2207/005 (2013.01);
Abstract
A memory device Input/Output includes a memory cell having a local bit line. A first IO circuit is coupled to the local bit line and is configured to output a local IO signal to a global bit line. A second IO circuit is coupled to the global bit line and is configured to output a global IO signal. A latch circuit is configured to latch the local IO signal in response to a data signal on the local bit line.