The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2020
Filed:
May. 03, 2019
Intel Corporation, Santa Clara, CA (US);
Kai Chong Ng, Butterworth, MY;
Natasya Athirah Abdul Khalid, Bayan Lepas, MY;
Florence Su Sin Phun, Gelugor, MY;
Yee Hung See Tau, Gelugor, MY;
Asmah Truky, Bayan Lepas, MY;
Ying Ern Ho, Bayan Lepas, MY;
Intel Corporation, Santa Clara, CA (US);
Abstract
A printed circuit board (PCB) includes a dielectric plane and a ground plane parallel to and spaced apart from the dielectric plane. The dielectric plane includes a pair of signal traces and a 3-dimensional (3D) grounded (GND) fence located between the pair of signal traces. The 3D GND fence is electrically connected to the ground plane, and protrudes perpendicularly from the dielectric plane. The 3D GND fence is located equidistant from each of the pair of signal traces, and the 3D GND fence is configured to block electromagnetic interference (EMI) from a first of the pair of signal traces to a second of the pair of the signal traces. The pair of signal traces is configured to form part of a noise-sensitive electronic circuit. The 3D GND fence may have a rectangular configuration.