The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Aug. 28, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Qingqing Liang, San Diego, CA (US);

Stephen Alan Fanelli, San Marcos, CA (US);

Sinan Goktepeli, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 29/06 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/02532 (2013.01); H01L 21/28194 (2013.01); H01L 21/823857 (2013.01); H01L 21/84 (2013.01); H01L 29/0653 (2013.01); H01L 29/517 (2013.01);
Abstract

An integrated circuit device includes a portion of a support wafer (e.g., a handle wafer), silicon on insulator layer, a first active device, and a second active device. The first active device has a first semiconductor thickness in a dielectric layer (e.g., a buried oxide layer). The first active device is on the SOI layer. The second active device has a second semiconductor thickness in the same dielectric layer as the first active device. The supporting wafer supports the first active device and the second active device. The second active device is also on the SOI layer. The first and second thicknesses are different from one another.


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