The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2020
Filed:
Jan. 23, 2019
Qualcomm Incorporated, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Vertically-integrated two-dimensional (2D) semiconductor slabs in Complementary Field-Effect Transistor (FET) (CFET) cell circuits are disclosed. A horizontal footprint of a CFET cell circuit may be reduced in an X-axis dimension by reducing a gate length of the N-type and P-type channel structures. The N-type and P-type channel structures may be formed of 2D semiconductor materials with high carrier mobility and strong on/off control, which allows a gate length of each semiconductor channel structure to be reduced without increasing a leakage current. By employing one or more elongated monolayers of 2D material in each slab, and vertically stacking slabs to form each semiconductor channel structure, a desired CFET drive strength may be adjusted according to a vertical dimension of the CFET cell circuit, while X-axis and Y-axis dimensions of the horizontal footprint are reduced.