The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Sep. 05, 2018
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Chia-Wei Su, Taoyuan, TW;
Fu-Ting Yen, Hsinchu, TW;
Ting-Ting Chen, New Taipei, TW;
Teng-Chun Tsai, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTRUING CO., LTD., Hsinchu, TW;
Abstract
A method includes forming a gate stack and an interlayer dielectric (ILD) over a substrate, wherein the interlayer dielectric is adjacent to the gate stack; forming an inhibitor covering the interlayer dielectric such that the gate stack is exposed from the inhibitor; performing a deposition process to form a conductive layer over the gate stack until the conductive layer starts to form on the inhibitor, in which the deposition process has a deposition selectivity for the gate stack with respect to the inhibitor; and performing an etching process to remove a portion of the conductive layer over the inhibitor.