The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Jul. 14, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Chin-Shen Lin, Taipei, TW;

Meng-Xiang Lee, Yunlin County, TW;

Kuo-Nan Yang, Hsinchu, TW;

Chung-Hsing Wang, Hsinchu County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/367 (2020.01); G06F 30/30 (2020.01); G01R 31/28 (2006.01); G06F 30/333 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/30 (2020.01); G01R 31/2856 (2013.01); G06F 30/367 (2020.01); G01R 31/2848 (2013.01); G06F 30/333 (2020.01); G06F 2119/12 (2020.01);
Abstract

A system for simulating reliability of a circuit design includes: a first memory device, arranged to store a technology file, wherein the circuit design comprises a plurality of circuit cells, and the first memory device further stores a plurality of first failure rates corresponding to a first circuit cell in the plurality of circuit cells; a first simulating device, coupled to the first memory device, for generating a first specific failure rate of the first circuit cell according to the plurality of first failure rates and the technology file; and an operating device, coupled to the first simulating device, for generating a total failure rate of the circuit design according to the first specific failure rate.


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