The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2020
Filed:
Jul. 26, 2018
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventors:
Wei-Yang Lee, Taipei, TW;
Chia-Chun Lan, Taipei, TW;
Chia-Ling Chan, Taipei, TW;
Feng-Cheng Yang, Zhudong Township, TW;
Yen-Ming Chen, Chu-Pei, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD, Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 29/78 (2006.01); H01L 29/161 (2006.01); H01L 29/08 (2006.01); H01L 29/167 (2006.01); H01L 29/66 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 21/31111 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/167 (2013.01); H01L 29/66795 (2013.01); H01L 29/66803 (2013.01); H01L 21/823814 (2013.01);
Abstract
A method for fabricating a semiconductor device includes forming a doped semiconductor layer on a substrate and forming a fin structure disposed on the doped semiconductor layer. The fin structure is doped with a p-type dopant. The method further includes forming a source/drain region within an upper portion of the fin structure and forming a fin sidewall along a lower portion of the fin structure. The fin sidewall has the p-type dopant.