The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2020
Filed:
May. 16, 2018
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 23/00 (2006.01); H01L 23/544 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/3185 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/544 (2013.01); H01L 24/16 (2013.01); H01L 2223/54493 (2013.01); H01L 2224/16235 (2013.01); H01L 2924/3512 (2013.01);
Abstract
A method of manufacturing a semiconductor structure includes the following operations. A wafer with an orientation mark at a first crystal orientation represented by a family of Miller indices comprising <ijk> is provided, wherein ijk=2. A first chip and a second chip are connected to a first surface of the wafer. A first edge of the first chip and a second edge of the second chip are adjacent to each other. A boundary extending in a direction between the first edge and the second edge is formed. The direction is not parallel to the first crystal orientation.