The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Jan. 08, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Poovaiah M Palangappa, San Jose, CA (US);

Ravi H. Motwani, Fremont, CA (US);

Santhosh K. Vanaparthy, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/11 (2006.01); G06F 11/10 (2006.01); G11C 29/04 (2006.01); H03M 13/37 (2006.01); H03M 13/00 (2006.01); H03M 13/53 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1125 (2013.01); G06F 11/1012 (2013.01); G06F 11/1048 (2013.01); G06F 11/1068 (2013.01); G11C 29/04 (2013.01); H03M 13/112 (2013.01); H03M 13/1117 (2013.01); H03M 13/3723 (2013.01); H03M 13/6325 (2013.01); H03M 13/658 (2013.01); G11C 2029/0411 (2013.01);
Abstract

Examples include techniques for improving low-density parity check decoder performance for a binary asymmetric channel in a multi-die scenario. Examples include logic for execution by circuitry to decode an encoded codeword of data received from a memory having a plurality of dies, bits of the encoded codeword stored across the plurality of dies, using predetermined log-likelihood ratios (LLRs) to produce a decoded codeword, return the decoded codeword when the decoded codeword is correct, and repeat the decoding using the predetermined LLRs when the decoded codeword is not correct, up to a first number of times when the decoded codeword is not correct. When a correct decoded codeword is not produced using predetermined LLRs, further logic may be executed to estimate the LLRs for a plurality of buckets of the plurality of dies, normalize magnitudes of the estimated LLRs, decode the encoded codeword using the normalized estimated LLRs to produce a decoded codeword, return the decoded codeword when the decoded codeword is correct, and repeat the decoding using the normalized estimated LLRs when the decoded codeword is not correct, up to a second number of times when the decoded codeword is not correct.


Find Patent Forward Citations

Loading…