The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Jul. 08, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yang-Che Chen, Hsinchu, TW;

Tsung-Te Chou, Taipei, TW;

Chen-Hua Lin, Yunlin County, TW;

Huang-Wen Tseng, Hsinchu County, TW;

Chwen-Ming Liu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/66 (2006.01); G01R 31/28 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 22/34 (2013.01); G01R 31/2884 (2013.01); H01L 21/56 (2013.01); H01L 21/6835 (2013.01); H01L 21/6836 (2013.01); H01L 21/76885 (2013.01); H01L 23/3128 (2013.01); H01L 23/481 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 24/13 (2013.01); H01L 24/96 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 21/568 (2013.01); H01L 25/0655 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68359 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/11002 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/18 (2013.01); H01L 2224/73253 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06586 (2013.01); H01L 2225/06596 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/04642 (2013.01); H01L 2924/059 (2013.01); H01L 2924/05042 (2013.01); H01L 2924/05442 (2013.01); H01L 2924/06 (2013.01); H01L 2924/0695 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A method of detecting delamination in an integrated circuit package structure, the method includes forming a plurality of through vias over a carrier substrate; placing a device die over the carrier substrate and between the through vias, wherein the device die comprises a metal pillar; forming a molding material surrounding the device die and the through vias; forming a testing metal line extending along a top surface of the molding material and past an interface between the device die and the molding material; applying a current to the testing metal line; detecting an electrical signal of the testing metal line during the applying the current to the testing metal line; and determining, based on the detected electrical signal of the testing metal line, whether a delamination occurs between the device die and the molding material.


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