The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2020

Filed:

Jul. 17, 2018
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Hao Jiang, San Jose, CA (US);

He Ren, San Jose, CA (US);

Hao Chen, Santa Clara, CA (US);

Mehul B. Naik, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/66 (2006.01); H01L 21/02 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 21/3205 (2006.01); H01L 21/3213 (2006.01); C23F 1/00 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76832 (2013.01); C23F 1/00 (2013.01); H01L 21/0206 (2013.01); H01L 21/02186 (2013.01); H01L 21/0338 (2013.01); H01L 21/31122 (2013.01); H01L 21/31144 (2013.01); H01L 21/32051 (2013.01); H01L 21/32136 (2013.01); H01L 21/32139 (2013.01); H01L 21/76877 (2013.01); H01L 21/76892 (2013.01); H01L 22/26 (2013.01); H01L 28/75 (2013.01);
Abstract

Generally, embodiments described herein relate to methods for manufacturing an interconnect structure for semiconductor devices, such as in a dual subtractive etch process. An embodiment is a method for semiconductor processing. A titanium nitride layer is formed over a substrate. A hardmask layer is formed over the titanium nitride layer. The hardmask layer is patterned into a pattern. The pattern is transferred to the titanium nitride layer, where the transferring comprises etching the titanium nitride layer. After transferring the pattern to the titanium nitride layer, the hardmask layer is removed, where the removal comprises performing an oxygen-containing ash process.


Find Patent Forward Citations

Jiang, Hao. (2020). Methods for manufacturing an interconnect structure for semiconductor devices (U.S. Patent No. 10692759). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10692759

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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