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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10679883 B1

PDFFull Text
Date of Patent:
Jun. 09, 2020

Filed:

Oct. 03, 2016

Wafer plate and mask arrangement for substrate fabrication

Applicant:

Intevac, Inc., Santa Clara, CA (US);

Inventors:

Terry Bluck, Santa Clara, CA (US);

Aaron Zanetto, San Jose, CA (US);

William Eugene Runstadler, Jr., Livermore, CA (US);

Terry Pederson, Sunnyvale, CA (US);

Assignee:

INTEVAC, INC., Santa Clara, CA (US);

Attorneys:

Womble Bond Dickinson (US) LLP

Joseph Bach, Esq.

Primary Examiner:

Jeffrie R Lund

Assistant Examiner:

Stanislav Antolin

Int. Cl.
CPC ...
H01L 21/68 (2006.01); H01L 21/683 (2006.01); H01L 21/677 (2006.01); H01L 31/18 (2006.01); C23C 16/04 (2006.01); H01L 21/673 (2006.01); C23C 14/04 (2006.01); C23C 16/458 (2006.01); C23C 14/50 (2006.01);
U.S. Cl.
CPC ...
H01L 21/682 (2013.01); C23C 14/042 (2013.01); C23C 14/50 (2013.01); C23C 16/042 (2013.01); C23C 16/4585 (2013.01); H01L 21/6734 (2013.01); H01L 21/67346 (2013.01); H01L 21/67706 (2013.01); H01L 21/67736 (2013.01); H01L 21/681 (2013.01); H01L 21/6838 (2013.01); H01L 31/18 (2013.01);
Abstract

A system for processing wafers in a vacuum processing chamber. Carrier comprising a frame having a plurality of openings, each opening configured to accommodate one wafer. A transport mechanism configured to transport the plurality of carriers throughout the system. A plurality of wafer plates configured for supporting wafers. An attachment mechanism for attaching a plurality of wafer plates to each of the carriers, wherein each of the wafer plates is attached to a corresponding position at an underside of a corresponding carrier, such that each of the wafers positioned on one of the wafer carriers is positioned within one of the plurality of opening in the carrier. Mask attached over front side of one of the plurality of opening in the carrier. Alignment stage supports wafer plate under the opening in the carrier. A camera positioned to simultaneously image the mask and the wafer.

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